Low power and high speed level shifters in 0.18um technology

Abstract

As the demand of handheld devices like personal computers, cell phones, multimedia devices etc., is growing, low power consumption has become major design issue for microelectronics circuits. In multi voltage systems, level shifters are significant circuit components and are used in between core circuit and I/O circuit. In this paper high level shifters for low power and high speed application have been presented. Level shifter II has power consumption of 180.75pw and delay of 435.66 us as compared to 231.56 pw and 49.57 ms of level shifter I. Level shifter IV has power consumption of 70.29 pw and delay of 282.87 ps as compared to 77.18 pw and 299.26 ps of level shifter III. All the circuits were simulated using Mentor Graphics Design Architect 0.18um Technology.