Low Power Adiabetic Logic System for Biomedical Applications

Abstract

There have been significant advances in sensors and device structures in the medical industry, particularly in implanted medical devices. Increasingly complex electronic circuitry may now be implanted in the human body thanks to compact, high-energy batteries and hermetic packaging. These gadgets must adhere to strict power consumption guidelines due to the battery recharging schedule. Designing energy-efficient circuits and systems becomes increasingly important as a result of this fact. Adiabatic circuits provide a hopeful alternative for traditional circuitry in case of low energy design. Because of power-clock phases synchronization complexity, designing and functionally verifying presenting 4-phase adiabatic circuitry takes longer. Accordingly, multiple clock generators are used typically and can reveal enhanced consumption of energy in the network of clock distribution. Furthermore, they are not suitable for designing in high-speed because of their clock skew management and high complexity issues. In this paper, TMEL (True multi-phase energy recovering logic), the first energyrecovering/adiabatic logic family is presented for biomedical applications, which functions using the scheme multiple-phase sinusoidal clocking. Moreover, a system of SCAL, a source-coupled variation with TMEL having enhanced energy efficiency and supply voltage scalability, is introduced. A novel true multi-phase Approach and Source-coupled adiabatic logic for energy effective communication system is proposed. The adiabatic logic is employed for both write and read side operation. The CMOS inverter is integrated with TMEL cascades, which in turn reduces leakage loss. In SCAL, the optimal performance at any operating circumstance is attained byan adjustable current source in each gate. SCAL, and TMEL, are capable of outperforming existing adiabatic logic families concerning operating speed and energy efficiency. The performance analysis was carried and simulated through 45 nm CMOS inverter in terms of leakage power, delay, and power consumption. In particular, for the clock rates that range from 10 MHz to 200 MHz, the proposed SCAL was more energy-efficient and less dissipative on comparing their pipelined or purely combinational CMOS counterparts. In biomedical equipment, the system may be included into the low-power design since it is energy efficient and very robust. Improvements in VLSI technology, such as increased dynamic range, low-voltage EEPROMs (electrically eraseable programmable ROMs), and specific sensor techniques, are also expected to contribute to advancements in implanted medical devices in the near future.