Abstract
A noise-shaped two-step ADC is presented in this paper. This ADC exploits residue feedback and a new capacitor/opamp sharing scheme to achieve high order noise shaping with minimal design complexity. The application of the proposed architecture in low power Delta-Sigma modulators is studied in this paper. A prototype ADC is fabricated in a 0.18 μm CMOS process. With a 1.56 MHz bandwidth (8x OSR), 2.6 mW analog power consumption, and 1.2 V analog supply voltage, the measured dynamic range and SNDR of this prototype IC are 78 dB and 75 dB.
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