Low noise driver and bias hardware circuit design based on CMOS detector

Abstract

Compared with CCD detector, CMOS detector has the advantages of high integration, low power consumption, fast readout speed and low production cost. CCD detectors are used in traditional astronomical observations. At present, low-noise CMOS detectors are not used to realize spaceborne astronomical projects in the world. From the index analysis of a project, one 6K * 6K CMOS detector which developed by a company can meet application of one project. Based on this detector, designing low noise driver and bias hardware circuit. This design mainly uses LDO with low noise and high PSRR to produce stable low noise driving power supply, in addition, the driving signal waveform required by the detector is controlled by FPGA to ensure the signal integrity to avoid interference feed. The bias voltage required by the detector is generated by low-noise voltage reference device, high-resolution DAC and low-noise operational amplifier.