Abstract
This paper reports about hydrogenated amorphous silicon which can be employed as low-loss optical material for small footprint and cost-effective photonic integrated circuits. Basic waveguides, photonic wire based couplers, Mach-Zehnder interferometers, ring resonators and Mach-Zehnder assisted ring resonators were designed, fabricated, and optically characterised. The propagation loss of rib and photonic wire waveguides were determined to be 2 dB/cm and 5.3 dB/cm, respectively. The 90°bending losses of 5 µm curved photonic wires were determined to be 0.025 dB/90°. Three-dimensional tapers, which were fabricated without additional etching steps and were deposited on top of the fabricated photonic wires showed a net coupling loss of 4 dB/port. Multimode 3 dB-splitters were systematically investigated resulting in 49-51% splitting ratios. Mach-Zehnder interferometers that were realised with these splitters showed interference fringe depths of up to 25 dB for both polarisations. Compact ring resonators with 10 µm radius implemented as notch filters and in Mach-Zehnder coupled configurations provided extinction ratios of ≥20 dB and Q-factors up to 7500.
Highlights
Amorphous silicon dielectric thin films are widely used in industrial and consumer electronic applications and are already present in everyday life
Far hydrogenated amorphous silicon (a-Si:H) is still rarely exploited as photonic material in the field of integrated optics, where it could be potentially used as a transparent material in the near infrared region for telecommunication and computing applications, or for chemical and biological diagnostics and sensing
The a-Si:H material deposition and fabrication technology was optimised in order to achieve high refractive index and low-loss photonic waveguides
Summary
Amorphous silicon dielectric thin films are widely used in industrial and consumer electronic applications and are already present in everyday life. Among the Si-based high index materials SOI shows the highest optical quality in terms of material absorption [1], but exhibits limited multilayer capabilities This restricts the flexibility in the design and the fabrication of three-dimensional applications and the number of vertical interacting optical layers per chip. The released thermal budget of this process directly meets backend fabrication requirements, which facilitates the multilayer stacking of photonic layers on top of integrated microchips in the last step of the CMOS process line. This will allow combining the benefits of integrated electronic circuits with the unique properties of high-speed optical data transmission by interconnecting both disciplines
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