Low-Loss I/O Pad With ESD Protection for K/Ka-Bands Applications in the Nanoscale CMOS Process

Abstract

The electrostatic discharge (ESD) protection devices are generally designed and employed near the input/output (I/O) pad to avoid the impact of ESD events. The diodes operated under forward-biased condition are widely used as ESD protection devices in integrated circuits. However, the parasitic effects of the ESD protection diodes with large dimension will seriously affect the performance of high-frequency circuits. In order to reduce the signal loss, the parasitic capacitance of ESD protection diodes must be minimized. Therefore, this brief proposed two low-loss I/O pads combined with stacked inductor and ESD protection diodes for K/Ka-bands applications. The traditional and proposed designs of I/O pads with ESD protection have been compared in silicon chip. The measurement results have demonstrated that the proposed structures with sufficient ESD-protection ability can achieve lower signal loss than the traditional design within K/Ka bands.