Abstract

Packaging of radio frequency (RF) microelectromechanical system (MEMS) devices requires a good electrical performance, and thus requires the parasitic effects of packaging to be minimal. This paper presents the design, fabrication, and characterization of improved low-loss wafer-level packaging (WLP) platform with through-silicon-via (TSV) interposer for RF-MEMS packaging. The insertion loss because of parasitic effects is reduced using optimized grounding configuration and surface passivation. The coplanar waveguide (CPW) test vehicle, high-frequency antenna, RF tuner, and film bulk acoustic resonator (FBAR) filter are fabricated and characterized using the developed WLP platform with TSV. To determine the RF performance of the package, the CPW transmission lines are fabricated on high-resistivity Si substrates, and the grounding configuration is optimized. The fabrication of the RF-MEMS WLP involves the process of a TSV cap wafer and CPW transmission lines or RF MEMS on the substrate wafer. TSV cap process includes TSV etching, void-free TSV plating, and redistribution layer postprocess on thin TSV wafer. The electrical characterization of the fabricated devices is performed. The optimized model has a wide bandwidth of 26.5 GHz and a packaging loss of 0.1 dB at 10 GHz. This implies that the effect of packaging on the performance of RF device is expected to be minor. The developed WLP platform is used for the 94-GHz antenna, RF tuner, and FBAR filter packaging and the characterization of RF-MEMS devices is presented.

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