Low-Leakage and Compact Registers with Easy-Sleep Mode

Abstract

Multi-threshold voltage CMOS (MTCMOS) is an effective technique for suppressing the leakage currents in idle circuits. When the conventional MTCMOS technique is directly applied to a sequential circuit however the stored data is lost during the low-leakage sleep mode. Significant energy and timing penalties are suffered to restore the pre-sleep system state at the end of the sleep mode with the conventional MTCMOS circuits. Two new master-slave MTCMOS memory flip-flops are presented in this paper for providing a low-complexity and low-leakage data retention sleep mode. A small size high threshold voltage static memory cell is integrated into an MTCMOS flip-flop to preserve the stored data while drastically reducing the leakage power consumption of idle sequential circuits. The already existing sleep signal of the MTCMOS circuitry is also used for controlling the data retention and restoration operations, thereby eliminating the need for any extra control signals. The memory flip-flops provide a significantly simplified sleep control/data transfer mechanism and reduce the circuit area by up to 37.21% as compared to the previously published MTCMOS flip-flops. Furthermore, the leakage power consumption with the presented techniques is reduced by up to 97.71% as compared to the previously published techniques in a UMC 80 nm CMOS technology.