Low Latency Path Prediction Mechanism in 2D-NoC

Abstract

Network-on-Chip (NoC) has an efficient on-chip communication solution for Chip Multi-Processors (CMPs) in order to overcome traditional bus connections. One of the disadvantages of congestion in the NoC is increasing the latency. Therefore, congestion-aware routing algorithms are proposed for decreasing the latency. This paper aims to develop a congestion-aware routing mechanism for 2D mesh-based NoCs based on Evolving Fuzzy Neural Network (EFuNN). Inspiring the advantages of the Neural Network and the fuzzy system, EFuNN has been used for training the network. The algorithm examines network traffic status and chooses the best path from the available paths using Fuzzy Neural Network. Using this algorithm, the traffic is distributed through the areas that are less congested. Experimental results show that the on-chip network utilizing the proposed method outperforms state-of-the-art research works in terms of latency regarding different traffic patterns for various 2D-mesh topologies.