Abstract

Drain current-gate voltage, I d ( V g ) characteristics and the power spectral density, PSD , of I d fluctuations were obtained on SiGe channel pMOSFETs and on their Si homologues, for I d intensities varied from deep sub-threshold to strong inversion values. Devices with 2.2nm thick SiO 2 gates and channel lengths 50 nm <L<10μm were used. In heterostructures, the SiGe layers were 20nm thick and buried under 2nm of Si . The data were simulated, assuming a parallel current flow in the interface and the SiGe channels, with associated noise sources. The transport parameters, extracted from I d ( V g ) characteristics, served for calculating the PSD ( I d ) functions. The latter required adjusting the interface trap density and a parameter α c , accounting for the effect of the interface charge fluctua-tions on the hole mobility fluctuations, significant at high levels of trap filling i.e. high I d . We found that the PSD in the SiGe devices was up to 10 times lower than in the Si controls at sufficiently high I d . The simulation, accounting for the data, required a significant lowering of α c for the SiGe channel. That implies that the LFN reduction in SiGe MOSFETs results from a weaker interaction of the SiGe holes with the interface charges. The sub-0.1μm channel devices show a similar noise lowering, in spite of the hole mobility degradation.

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