Low-Frequency Noise Contributions From Channel and Contacts in InAs Nanowire Transistors

Abstract

Nanowire transistors are promising candidates for future electronics applications; however, they generally exhibit higher levels of low-frequency noise compared with traditional MOSFETs. The physics of this noise generation in nanowires needs to be understood for improving the device performance. In this paper, the low-frequency noise in InAs nanowire transistors was studied at different gate voltages before and after passivation by a polymethyl methacrylate (PMMA) layer. Noise levels in nanowire devices can be separated into contributions from the channel and from the contacts by analyzing the noise behavior under different bias conditions for devices with varying channel lengths. It is shown that a noise component, which is independent of channel length, can be attributed to the contacts, and a length-dependent component is attributed to the channel. Applying the PMMA passivation layer over the entire device reduces the noise level generated by the channel, but does not change the noise level generated by the contacts. This paper provides a method to understand, and potentially improve, the noise performance. Operation in a channel-dominated bias regime allows extraction of a Hooge parameter specifically for the channel. PMMA passivation was effective in reducing this channel Hooge parameter from 1.4×10-1 to 1.8×10-3.