Abstract
In order to provide a systematic approach to the realization of filters with small chip area, two techniques which lead to a substantial reduction in the chip area occupied by MOSFET-C filters are proposed. The first method is based on using capacitance multipliers, while the second method relies on modifying the given circuit by appropriately adding cross coupled transistor pairs. Theoretical analysis and simulation results verifying the usefulness of the filters obtained through the proposed techniques are provided.
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