Low Field Vertical Charge Transport in the Channel and Buffer Layers of GaN-on-Si High Electron Mobility Transistors

Abstract

Substrate ramps and stepped stress transient measurements are applied to study vertical charge transport mechanisms in GaN-on-Si power HEMTs. By choosing appropriate bias points for substrate stress it is possible to single out the dominant charge transport mechanism: at low negative biases transport through carbon-doped GaN manifests itself in negative (decreasing) current transients with apparent activation energy (E <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">A</sub> ) = 0.29 eV, while at larger negative voltages transport through unintentionally doped GaN is characterized by positive (increasing) current transients (E <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">A</sub> = 0.38 eV). We present experimental evidence for 3D variable range hopping taking place in C-doped GaN and 1D hopping along the dislocations in unintentionally doped GaN. By investigating transients obtained from bidirectional voltage steps of 10 V potential difference in the range 0 to -140 V, we observe that hopping transport through dislocations shows non-Ohmic behavior at low substrate biases, which manifests itself in a time constant τ strongly dependent on bias. We propose that this can be explained by the existence of a diode junction between the dislocation core and the 2D electron gas (2DEG).