Low Execution Efficiency: When General Multi-core Processor Meets Wireless Communication Protocol

Abstract

Inefficient resource utilization of communication cell and base station is the major limitation of traditional Radio Access Network (RAN), which makes Cloud Radio Access Network (C-RAN) becomes a promising infrastructure. C-RAN data centers face physical constraints in space and power, so the efficient utilization of hardware is more critical. General multi-core processors are universally used in modern data centers, and it has become a critical factor of power, computational density and per-operation energy for modern data centers. In this paper, we select User Plane protocol from WCDMA wireless communication protocols, and implement it as a benchmark firstly. The User Plane protocol is responsible for processing and transferring high volume streaming data between user's mobile terminals and core network. Then, based on its hardware performance counters, we study performance of general multi-core processor when processing User Plane protocol. The evaluation results show that micro-architecture of dominant general multi-core processor is inefficient for User Plane protocol, that is, the dominant micro-architecture mismatches to needs of wireless communication protocols. The random memory access in a large memory address space is a typical characteristic in wireless communication applications, and it incurs high miss ratio of on-chip cache hierarchies. The frequent on-chip cache misses lead to amount of off-chip memory access operations, which incurs longer memory access latency as a dominant factor to degrade overall performance. Finally, we identify the processor's key micro-architecture characteristics that meet needs of wireless communication protocols, which would lead to improved power efficiency in C-RAN data centers.