Abstract
We have fabricated a gate-level stencil mask for GaAs field effect transistors with 1000 gates and 1-cm2 silicon foil area. Stress relief distortion was not significant relative to the measurement error of 25 nm(1σ). The results suggest that thermal distortion is also negligible for power densities less than 10 mW/cm2 . This corresponds to a PMMA exposure time of 12 s for 120-keV H+3 ions.
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