Low cost HDI multilayers – the power mesh architecture

Abstract

This paper describes the power mesh architecture (PMA), a new interconnection topology which leverages the production technologies of microvias, via‐in‐pads and fine‐line lithography to allow planar power distribution and dense signal interconnection, on only two or four metal layers. The PMA was derived from the interconnected mesh power system (IMPS) developed and patented by the High Density Electronics Center (HiDEC) of the University of Arkansas. The IMPS topology was created to reduce the cost and metal layers on thin‐film and ceramic multichip modules. Power distribution characteristics of IMPS are presented as measured from various test vehicles. The PMA for PCBs is presented as well as impedance tables. The initial application of PMA is shown as well as an application that helps develop the wiring density model for PMA. Finally, the eight step design process is outlined to create a PMA board and an example of a notebook computer.