Abstract

Targeting high-speed, low-cost, short-reach intra-datacenter connections, we designed and tested an integrated silicon photonic circuit as a transmitter engine. This engine can be packaged into an optical transceiver module which meets the QSFP-DD Form Factor, together with other electrical/optical components. We first present the design and performance of a high-speed silicon modulator, which had a 3-dB EO bandwidth of >40 GHz and an ER of >5 dB. We then incorporated the engine onto a test board and injected a 53.125 Gbaud PAM4 signal. Clear eye patterns were observed at the receiver with TDECQ ~3 dB for all four lanes.

Highlights

  • Due to its compatibility with mature CMOS manufacturing techniques, compact size and cost effectiveness, integrated silicon photonics have been well developed as an engine for optical transceivers [1,2,3,4] and widely deployed in datacenters for high-speed, short-reach connections

  • Silicon photonic engines have been used for higher data rates, such as 200 Gb/s per lane, for generation 800 Gb/s transceivers when heavy digital signal processing (DSP) is added [7]

  • 400 Gb/s DR4 transmitter we summarize the results of our current product and show plans for test and design in when we attach the silicon photonics engine to an evaluation board

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Summary

Introduction

Due to its compatibility with mature CMOS manufacturing techniques, compact size and cost effectiveness, integrated silicon photonics have been well developed as an engine for optical transceivers [1,2,3,4] and widely deployed in datacenters for high-speed, short-reach connections. Coherent modulation has been applied to silicon photonics engines for datacenter connections, achieving over 500 Gb/s per lane speed [8]. Silicon photonics is a low-cost, 500 m to 2 km, the ‘mid-range’ of the intra-datacenter links, whereas DMLs/EMLs are high-performance solution. When receiving the optical signal, we had to apply offline DSP with a shaping, pre-compensation and a peak-to-peak differential voltage as high as 5 V at digital square and filtering algorithm for timing recovery and a least mean square ppd algothe transmitter side. Other silicon photonics components, we confirmed successful 400 Gb/s signal transmisHowever, after we redesigned the modulator, doubled its bandwidth and optimized our sion in our new silicon photonics engine that met the IEEE standard. The the light light is is split split into into several several lanes, modulated, modulated, multiplexed multiplexed

G Lambda
Modulator Design and Characterization
30 GHz The was tested
DR4 Transmitter Test
Experimental transmitter
Summary and Prospect
Full Text
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