Abstract
In this brief, a low-complexity hardware architecture for multiple-input multiple-output (MIMO) orthogonal frequency-division multiplexing (OFDM) symbol detectors with two transmit and two receive antennas is proposed. The detectors support two MIMO-OFDM schemes of space-frequency block coded OFDM and space-division multiplexing OFDM in order to achieve higher performance and throughput. However, symbol detection processes for these two schemes have high computational complexity, which is a burden to hardware implementation of MIMO-OFDM symbol detectors. In order to reduce complexity, the proposed symbol detector is designed with shared architecture, where similar functional blocks are merged and share the hardware resources, and results in the reduction of logic gates by 34% over a conventional architecture employing two individual detectors
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callMore From: IEEE Transactions on Circuits and Systems II: Express Briefs
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
