Abstract
QR decomposition is a fundamental operation widely used in various signal detection schemes for multiple-input multiple-output (MIMO) systems. In this brief, a high-throughput converted form QR factorization (QRF) is investigated. The proposed two-phase computing scheme starts with a direct form factorization followed by a postprocessing using simple row/column permutations. Using coordinate rotation digital computer (CORDIC) algorithm, a massively parallel array architecture consisting of pipelined and folded CORDIC modules is developed to enhance the throughput. In addition, chaining mode operation is supported, where five successive signal vector updates can be performed the following every factorization. The chip implementation result in TSMC 0.18-μm CMOS process indicates the design, with an equivalent gate count 192100, can operate at 200 MHz and accomplish 25-M complex-valued QRF per second. This suggests a highest 3-Gb/s data rate for signal detections in a 4 × 4 MIMO system. The proposed design also outperforms other designs in two compound performance indices, i.e., data rate normalized with respect to gate count and power consumption, respectively.
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