Abstract
In order to address low power, low processing delay requirement of emerging satellite communication systems, there is a need for low complexity small block length forward error correction (FEC) codes. Furthermore the new trends towards the convergence of wireless and satellite terminals would also mean co-existence of support for very short and the long blocks of data in the same device. In this context a novel next generation high performance 4K low density parity check (LDPC) code is introduced in the paper. The error performance results for the proposed code are presented showing significant improvement of performance/complexity metrics over existing FEC systems.
Highlights
In communication systems forward error correction (FEC) coding improves data reliability by introducing redundant information into a data sequence prior to transmission, which enables a receiver to detect and possibly to correct errors without requesting retransmission of the original information
In order to address low power, low processing delay requirement of emerging satellite communication systems, there is a need for low complexity small block length forward error correction (FEC) codes
To improve the error correction performance of the low density parity check (LDPC) codes a outer BCH code is concatenated to the LDPC code, which helps in lowering the error floor
Summary
In communication systems FEC coding improves data reliability by introducing redundant information into a data sequence prior to transmission, which enables a receiver to detect and possibly to correct errors without requesting retransmission of the original information. The generation satellite communication systems e.g. digital video broadcast satellite/terrestrial (DVB-S2/T2) have readily adopted LDPC code for FEC [1], [2], mostly due to its near Shannon performance at very low signal to noise ratio [3]. The complexity of decoding the BCH at the receiver is not negligible, and the complexity increases with the error correction capability increasing the power consumption and overall processing latency. These factor demands innovative LDPC code design and their implementation, which has low error floors without the need of concatenation.
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