Low and high temperature device reliability investigations of buried p-channel MOSFETs of a 0.17 μm technology

Abstract

The hot carrier degradation of buried p-channel MOSFETs of a 0.17 μm technology is assessed in the temperature range between −40°C and 125°C. Within this temperature range, the degradation of the electrical parameter is investigated for different drain voltages and channel lengths (0.2–0.3 μm) in the gate voltage range between V GS=0 V and V GS= V DS. The analysis of the experimental results is presented and the physical processes responsible for the observed degradation at different stress conditions are discussed by reviewing previous works. Based on hot carrier modelling and lifetime extrapolation to operating conditions the stressing voltage conditions are analysed. For the experimentally investigated temperature range the worst case stress condition is identified at low temperatures for gate voltage at the maximum of the gate current ( I G max ). In the case of V GS corresponding to I G max two activation energies are determined for low and high temperatures. For temperatures above 125°C the worst case bias condition changes from V GS =V GS @I G max to V GS= V DS.