Abstract
AbstractAdvancing Silicon (Si) technology beyond Moore's law through 3D architectures requires highly efficient heat management methods compatible with foundry processes. While continued increases in transistor density can be achieved through 3D architectures, self‐heating in the upper tiers degrades the performance. Self‐heating is a critical problem for high‐power, high‐frequency, wide bandgap, and ultra‐wide bandgap devices as well. Diamond, known for its exceptional thermal conductivity, offers a viable solution in both these cases. Since thermal boundary resistance (between the channel/junction and diamond plays a crucial role in overall thermal resistance, this study investigates various dielectrics for interface engineering, such as Silicon dioxide (SiO2), amorphous‐ Silicon Carbide (a‐SiC), and Silicon Nitride (SiNx), to make a phonon bridge at gallium nitride (GaN)‐diamond and Si‐diamond interfaces. The a‐SiC interlayer reduces diamond/GaN (<5 m2K per GW) and diamond/Si (<2 m2K per GW) thermal boundary resistances by linking low‐ and high‐frequency phonons, boosting phonon transport through the interface. Engineered interfaces enhance heat spreading from the channel/junction and rule out premature failure.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
