Loss Analysis and Design Optimization of Large-Area High-Efficiency Back-Contacted Silicon Solar Cells

Abstract

Building on the previous development of large-area interdigitated back-contacted silicon solar cells employing a copper plating metallization process, a loss analysis of the cell performance is presented. The impact of our cell design on edge losses is reported, where it is shown that significant current and fill factor losses result, arising from an edge back surface field region that is adjacent to the emitter busbar. The cell schematic was redesigned to limit these edge effects, together with the reduction of the total busbar width. The measured results were validated by simulations, which enabled the optimum contact fraction to be employed. Combining these effects, interdigitated back contact solar cells were fabricated on 15.6 × 15.6 cm2 wafers, which achieved efficiencies of 22.5%, or 5.37-W maximum power output. The developments that enabled this improvement are discussed in this paper.