Abstract

A Hamming distance comparator (also known as $$k$$k-order comparator) compares its two operands and outputs an agreement if they differ in less than $$k$$k corresponding bits. In this paper, we introduce novel architectures for the design of Hamming distance $$k$$k comparators, for the usually adopted values 2 or 3 for $$k$$k. The proposed architectures are fully digital and are based on splitting the difference vector in smaller groups and performing comparison against $$k$$k in parallel with counting, leading to significant speedup against previous proposals. The derived architectures can also be used for fixed-threshold Hamming weight comparators for small or large threshold values. The proposed 2- and 3-order comparators are more than 60 and 31 % more efficient than the most competitive previous proposal, respectively, using the area $$\times $$× time$$^2$$2 metric, while their total power dissipation remains low.

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