Look Ahead CLS in Pipelined SAR ADCs

Abstract

This paper presents a new correlated level shifting (CLS) technique that relaxes the design criteria for the residue amplifier in pipelined successive approximation register (SAR) ADCs. Unlike prior techniques, this correlated level shifting technique does not load the residue amplifier during its initial estimation phase by sampling its output to generate an estimate for use in level-shifting. Instead, the estimate is generated by using the residue voltage stored on the SAR DAC to create a look-ahead path that charges the level-shifting and load capacitors before the start of amplification. The operation of the look-ahead CLS (LACLS) technique is described and its effect on key residue amplifier design criteria such as slew rate, linear output range, and dc gain is analyzed. Simulation results are provided to verify the technique in the context of a pipelined SAR ADC and a discussion is given on choosing an appropriate circuit-level implementation for the look-ahead path. Finally, the merits of look-ahead correlated level shifting are discussed and compared to other techniques.