Logical Circuits of a ΣΠ-Neuron Model

Abstract

The paper proposes a schematic representation for implementing a ΣΠ-neuron model. Two types of digital and hybrid ΣΠ-neurons are presented with two layers that include multiplication and summing operations. The networks are built using digital and analog electronics. The multiplication operations in both networks are carried out identically. Summing operations in the digital network is implemented through a digital circuit - an adder, while in the hybrid framework it is implemented via an analogue-to-digital conversion and analogue voltage adder. To set up the threshold voltage in the hybrid and digital networks the hybrid and logic comparators are employed correspondingly. The results obtained can be used to construct ΣΠ-neural networks that could be embedded into hardware/software for controlling mechatronic systems.