Abstract
The equivalent electrical circuit of a singleC60 electromechanical transistor in a planar lay-out ispresented using its experimental STM characteristics. Thiscircuit is used to demonstrate that such a hybrid molecularelectronic device can be used as a class A amplifier, a NOT orNOR gate and to implement an SRAM memory point. All the devicesare simulated using the SPICE routine to find their optimum loadresistance and cantilever grid size. The class A amplifier canoperate with a cut-off frequency of a few gigahertz while thelogic gate and memory are limited to a few tens of megahertz,but for a very small power design in the picowatt range.
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