Abstract
This paper focuses on usefulness of a plant model for model-checking of untimed properties of logic controllers. Verification results obtained on a case study by using the symbolic model-checker NuSMV and three methods: verification of the only controller, constraints-based verification, in which the plant is simply modeled as a set of physical constraints, and model-based verification, that relies on a detailed model of the plant, are presented. The results yielded by these approaches enable to draw up application rules for formal verification of logic controllers.
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