Localization of NVM Inter-Poly Defects using nanoprobing techniques

Abstract

The continuous growth and advancements of semiconductor devices for automotive applications and internet-of-things drive the demand and scaling of embedded non-volatile memories (eNVM). Existing eNVM landscape in 40 nm and 28 nm advanced processes is dominated by split-gate flash memory devices (Do, 2016) where inter-poly oxide (IPO) defect is one of the most challenging types of defect to localize (Tan et al., 2019). IPO defects typically surface as full or partial row NVM failures due to globally shared polysilicon select gate, control gate or erase gate among thousands of NVM cells. Conventional NVM bitmap is not effective to isolate these failures. In this paper, a systematic 2 steps isolation approach using nanoprobing techniques is proposed to effectively localize IPO defects. The first step involves the inter-poly leakage characterization to isolate the smallest failure sub-block. The next step utilizes Electron Beam Absorbed Current (EBAC) analysis to effectively localize IPO defect in nanoscale resolution subsequent TEM analysis. Two case studies of split-gate automotive grade eNVM suffering from read/write cycling failure were described to demonstrate the usefulness of the proposed techniques for accurate and precise localization on the NVM IPO defect.