Lithography Simulation Basics and a Study on Impact of Lithographic Process Window on Gate and Path Delays

Abstract

Photolithography is at the heart of semiconductor manufacturing. Historically, the wavelengths of light used in lithography processes were below or near the transistor feature sizes. However, in recent times the improvements in lithographic manufacturing systems have not kept pace with the demand for smaller devices. As a result, a 193 nm wavelength light source is being used to manufacture devices up to 32 nm and possibly beyond. Simulation of optical diffraction patterns is of paramount importance in sub-wavelength lithography. In this paper, we summarize techniques that have been used in sub-wavelength lithography simulation and present a study on gate and path delays based on statistical simulation of lithography process window. Results show that traditional statistical static timing analysis is overly pessimistic and significantly under-estimates circuit performance.