Abstract

We considered power amplifier (PA) linearization techniques, such as the Cartesian feedback, the feed-forward, and Ying technique and evaluated their effects on the performance of 1.9 GHz wireless transmitters. We implemented the single step transmitter, the two step transmitter and the PLL based transmitter architectures in 0.18 mum CMOS technology. We modified and implemented a two-stage power amplifier, which consists of class F driver with class E power amplifier used as load instead of the conventional class E power amplifier with a buffer. The use of the modified two-stage power amplifier with Ying linearization technique in the PLL based transmitter architecture has achieved the best results when compared to designs based on other linearization techniques and other transmitter architectures. In the designed PLL transmitter, the power amplifier's 1 dB compression point has increased to 24.5 dBm, and this is about 25 % higher than the result obtained by a design based on the conventional class E power amplifier with the buffer

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