Abstract
A linearity enhancement scheme for voltage-controlled oscillator (VCO)-based continuous-time (CT) delta-sigma (ΔΣ) analog-to-digital converters (ADCs) is proposed. Unlike conventional input feedforwarding techniques, the proposed feedforwarding scheme using digital feedback residue quantization (DFRQ) can avoid the analog summing amplifier, allow intrinsic anti-aliasing filtering (AAF) characteristic, and cause no switching noise injection into the input. A VCO-based CT ΔΣ ADC adapting the proposed DFRQ enables residue-only processing in the quantizer, avoiding the degradation of signal-to-noise and distortion ratio (SNDR) due to VCO nonlinearity. The use of DFRQ also reduces the voltage swing of integrators without the drawbacks caused by conventional input feedforwarding techniques. The performance evaluation results indicate that the proposed VCO-based CT ΔΣ ADC with DFRQ provides 30.3-dB SNDR improvement, reaching up to 83.5-dB in 2-MHz signal bandwidth.
Highlights
The scaling of the complementary metal-oxide-semiconductor (CMOS) process technology enables the improvement of operating speed and the reduction of power consumption of very large-scale integration (VLSI) circuits [1]
The voltage-controlled oscillator (VCO)-based CT ∆Σ analog-to-digital converters (ADCs) with digital feedback residue quantization (DFRQ) was designed, and the effectiveness was verified by simulation using Matlab
As mentioned in the description of the proposed architecture, the number of truncation bits in the ∆Σ truncator is a trade-off between the performance of signal-to-noise and distortion ratio (SNDR) and the number of output bits determining the levels of the feedback
Summary
Electronics 2021, 10, 2773 advantages of the VCO-based ADC are simple implementation in a nanometer CMOS technology and easy integration of multi-bit quantization levels without using a large number of analog comparators whose operation is very sensitive to offset voltage and supply voltage scaling. It can reduce the input capacitance when it is used in a multibit ∆Σ ADC configuration, and consume less power due to reduced load capacitance of the last loop filter stage. VCO-based ADC [14] has been proposed to reject the nonlinearity of the VCO, it needs multiple VCO-based ADCs for one-order noise shaping and still requires precise gain matching between paths
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