Linearity Distortion Assessment and Small-Signal Behavior of Nano-Scaled SOI MOSFET for Terahertz Applications

Abstract

Fully-Depleted Silicon-on-Insulator (FD SOI) MOS technology has already been reported as a strong contender in nanoscale CMOS designs. This work presents the linearity-distortion assessment, small-signal and radio-frequency noise-behavior of dual-metal-insulated-gate (DMIG) source-engineered (SE) FD SOI MOSFET for terahertz (THz) applications. Here, linearity-distortion performance has been monitored on the basis of numerical calculations of transconductance and its higher-order derivatives along with the voltage-intercept points, and various parameters of intermodulation-distortion. This analysis also practices the guidelines of device design with least linearity-distortion in radio-frequency integrated-circuits based communication systems at 50 nm technology node. Further, the small-signal and RF noise-behavior have been examined on the basis of high-frequency scattering-parameters for the analysis of input/output reflection-coefficients (S11/S22), reverse/forward transmission-coefficients (S12/S21), Stern's-stability-factor (K), minimum noise-figure, noise-conductance and cross-correlation factor (<VN-in.VN-out*>). The analysed results affirm the ultimate reduction in reflection-coefficients and a significant increase in transmission-coefficients in case of DMIG FD SOI MOSFET at THz range as compared to existing MOS structures. Also, the analysis reveals the considerable reduction in various radio-frequency noise FOMs and thus represents the device efficacy in low-noise-amplifiers. All these studies have been carried out by performing numerical simulations over TCAD-ATLAS simulator from Silvaco along with quantum-mechanical-effect (QME) and Bohm-quantum-potential (BQP) models.