Abstract
The linear-region conductance of silicon-on-insulator (SOI) MOSFET's is modeled by properly combining theoretical descriptions of the effects of grain boundaries in the channel region and of charge coupling between the front and back gates. The model is supported by measurements of thin-film SOI MOSFET's with and without grain boundaries. The theoretical-experimental analysis clearly distinguishes the charge-coupling effect from the grain-boundary effect, both of which can be beneficial to the MOSFET performance, and shows that the effects are not simply superimposed.
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