Abstract
Deep CMOS Technology requires more and more accurate and robust RF CMOS models (PSP, BSIM, EKV...) for circuit design, predictable down to millimetrique wave range. Because of their scalibility, these models are the more convenient ones, their major drawback being the huge number of parameters to experimentally extract, which is costly and time consuming. Hence, whenever CMOS Technology is under development, it looks interesting to investigate another approach. For this purpose, we propose in this work to show the usefulness of several in-house RF oriented models, fast to extract, to investigate the AC and noise properties of a 65 nm bulk CMOS Technology. An extension is also proposed through the presentation of a large signal model, for which an application was carried out considering a 130 nm CMOS SOI technology.
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