Linear Active Disturbance Rejection Control for DC Side Voltage of Single-Phase Active Power Filters

Abstract

Active power filter (APF) has become an effective approach to suppress harmonic and compensating the reactive power of a power grid. In this paper, the topological structure of the single-phase APF is T-type three-level which can suppress harmonic. For the traditional dual-loop PI control of APF, the voltage loop has poor disturbance rejection performance and long response time under nonlinear load and load mutation. To eliminate the impact on the reduction of power quality of the power grid, this paper uses a PI control of the current loop and a linear active disturbance rejection control (LADRC) of voltage loop. The first-order LADRC controller, which uses a linear extended state observer (ESO) and a linear state error feedback (SEF), does not depend on an explicit mathematical model of the controlled object. In this paper, a 2kVA experimental prototype with a processor of TMS320F28335 is designed to testify the performance and effectiveness of the presented method. The results of simulation and experiments show that the LADRC has better disturbance rejection performance and faster dynamic response than PI control under nonlinear load and load mutation.