Abstract

A line fetch/prefetch strategy is presented with reference to the architecture of a cache memory specialized to contain a portion of the stack area of the program address space. Our strategy takes advantage of the stack paradigm to predict the information items that have a high probability of being referenced soon and prefetch them. When the stack expands, the cache lines reserved for the new stack portions at the stack top are not initialized with quantities fetched from the primary memory, as the primary memory stores no valid information for these lines. When the stack shrinks, the lines made free at the stack top are not copied to the primary memory, as they contain discarded stack items. No address tag is used to translate memory addresses into line numbers in the cache line array. The resulting hardware savings are especially important in view of an on-chip implementation of the cache.

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