Abstract

Ultimate bounds on the maximum operating frequency of networks of Quantum-dot Cellular Automata (QCA) devices have yet to be established. We consider the adiabaticity of such networks in the two-state approximation where clocking is achieved via modulation of the interdot tunneling barriers. Estimates of the maximum operating frequency that would allow a 99% probability of observing the correct logical output are presented for a subset of the basic components used in QCA network design. Simulations are performed both in the coherent limit and for a simple dissipative model. We approach the problem of tunnel-based clocking from the perspective of quantum annealing and present an improved clocking schedule allowing for faster operation. Using an analytical solution for driven QCA wires, we show that the maximum operating frequency in the coherent limit falls off with the square of the wire length, potentially limiting the size of clocked regions.

Highlights

  • In recent years, there has been great interest in technologies that extend beyond the projected scale limits of conventional CMOS, ranging from new transistor designs with alternate channels[1,2] to entirely novel computational architectures.[3,4,5] Quantum-dot CellularAutomata (QCA) encodes binary information in the distribution of charges in devices or cells composed of arrays of quantum dots.[6,7] Coulombic interactions between occupying charges facilitate coupling between the charge states of neighboring cells.Arrangements of these cells can be designed with ground states that encode familiar logic gates.[8]

  • Using an analytical solution for driven Quantum-dot Cellular Automata (QCA) wires, we show that the maximum operating frequency in the coherent limit falls off with the square of the wire length, potentially limiting the size of clocked regions

  • Significant challenges must be solved for any realistic QCA implementation, such as limiting device power at high density using reversible gates,[12,13] designing robust wire crossings[14] and clocking networks,[15,16] and interfacing with the existing CMOS architecture

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Summary

INTRODUCTION

There has been great interest in technologies that extend beyond the projected scale limits of conventional CMOS, ranging from new transistor designs with alternate channels[1,2] to entirely novel computational architectures.[3,4,5] Quantum-dot Cellular. This two-state approximation excludes configurations where charges occupy adjacent dots, typically of higher energy, as well as potential configurations with fewer or more charges which might occur for some implementations While these configurations tend not to contribute to the low energy states of a biased QCA device,[20] it remains an open question whether they can be neglected for a general network in a particular QCA implementation. The 2-state clocking field is usually interpreted as a modulation of the interdot tunneling barriers;[12] a method for achieving this at the nanoscale has not been sufficiently addressed in the literature While we leave this an open question, it should be noted that the functional role of clocking is to promote or suppress tunneling between the polarization states. IV and V show performance results for both full coherence and in the presence of a thermal bath

SIMULATING QCA DYNAMICS
Coherence vector formalism
Solver details
CHOOSING A CLOCKING SCHEDULE
Quantum annealing framework
Performance metrics
Figures of merit for the ground state
Candidate clocking schedules
Choosing the initial clocking field
Wire analysis
DISSIPATIVE BEHAVIOR
Spectral relaxation of the density operator
Spectral relaxation with the ICHA
Mean field relaxation with the ICHA
Findings
CONCLUSION
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