Abstract
In this paper, two light-load efficiency improvement methods are presented and applied to the ultrahigh step-down converter. The two methods are both based on skip mode control. Skip Mode 1 only needs one half-bridge driver integrated circuit (IC) to drive three switches, so it has the advantages of easy signal control and lower cost, whereas Skip Mode 2 requires one half-bridge driver integrated circuit IC, one common ground driver IC, and three independent timing pulse-width-modulated (PWM) signals to control three switches, so the cost is higher and the control signals are more complicated, but Skip Mode 2 can obtain slightly higher light-load efficiency than Skip Mode 1. Although the switching frequency used in these methods are reduced, the transferred energy is unchanged, but the output voltage ripple is influenced to some extent.
Highlights
The 48 V direct bus (DC) bus is very popular in the telecom system and networking communication equipment
The 48 V DC bus is first stepped down by the first-stage converter to the 12 V DC bus to supply the power on load (POL) converter, and the POL converter creates a low voltage to the load
Literature Review The methods proposed in [1,2,3,4] use a two-stage buck converter to obtain a high stepdown voltage gain, but the methods used in [1,2,3,4] require a lot of active switches, passive components, and driving circuits
Summary
The 48 V direct bus (DC) bus is very popular in the telecom system and networking communication equipment. The traditional two-stage step-down converter architecture generates a low output voltage (usually under 3.3 V) from 48 V to feed the digital circuit. Literature Review The methods proposed in [1,2,3,4] use a two-stage buck converter to obtain a high stepdown voltage gain, but the methods used in [1,2,3,4] require a lot of active switches, passive components, and driving circuits. SSStttaaattee 22 AAss sshhoowwnn iinn tt11––tt ooff FFiigguurreee 433,,, QQQ111 iiss ttuurrnneedd--oofffff,,, aaannnddd QQQ222 aanndd QQ333 rreemmaaiinn ooffff. CCCuurrrreenntt ppaatthh iinn SSttaattee 22 uunnddeerr NNoorrmmaall MMooddee. SSiinncceettthhheeevvvooollltttaaagggeeevvvdddsss iiss zzeerroo iinn SSttaattee 55,,iiffQQ11 iiss ttuurrnneedd oonn dduurriinnggtthhiisssstttaaattteee,,,ttthhheeennnQQQ111hhaassZZZVVVSSS ttuurrnneedddooonnn...IInnnaaaddddddiiitttiiiooonnn,,,ddduuueeettotootththheeelleleeaaakkkaaagggeeeiniinnddduuucctcattananncecceeaanandnddiNiiNN111bbbeeeiininngggsssmmmaaalllleleerrrtththhaaannniNiiNN222,,tthheerrreee iissssttiilllleexxcceessssccuurrrrreeennntttflffllooowwwiininngggttthhhrrrooouuuggghhhQQQ333,,,bbbuuutttQQQ333 hhaass bbeeeennttuurrnneeddooffff,,ssootthheebboodddyyydddiiiooodddeeeooofff Electronics 2021, 10, x FOR PEER REVIQEQW333 iiss ffoorrcceedd ttoo ccoonndduucctt. State 9 As shown in t8–t0 of Figure 13, when vds is zero, Q1 is turned on, and Q1 can be turned on with ZVS
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