Abstract
We conducted a systematic investigation of the light extraction efficiency (LEE) of GaN-based vertical micro-scale light-emitting diode (μ-LED) structures using three-dimensional finite-difference time-domain (FDTD) simulations. The LEE of μ-LED structures was found to have a strong dependence on structural parameters such as the shape of the chip cross section, chip dimension, and p-GaN thickness. The LEE of a μ-LED with a circular cross section was lower than that of a μ-LED with a square cross section by 5∼10% owing to the coupling of light with high-quality-factor whispering gallery modes. The LEE of a μ-LED structure decreased as the chip dimension increased, which could be attributed to the increased portion of trapped light inside the LED chip and increased light absorption in the GaN with an increasing chip dimension. In addition, the LEE varied significantly with the thickness of the p-GaN layer, which could be explained by the strong dependence of the angular distribution of the emission pattern on the p-GaN thickness. The FDTD simulation method presented in this study is expected to be advantageously employed in designing μ-LED structures with high LEE.
Highlights
There has been an increasing interest in micro-scale light-emitting diodes (μ-LEDs), which can be utilized as light sources for deformable displays, optogenetics, and visible light communications [1]–[6]
The light extraction efficiency (LEE) of a μ-LED structure decreased as the chip dimension increased, which could be attributed to the increased portion of trapped light inside the LED chip and increased light absorption in the GaN with an increasing chip dimension
This large decrease in the LEE for the x-polarized light is attributed to the coupling of the dipole source with whispering gallery modes (WGMs) that exist along the circumference of the circular boundary [39]
Summary
There has been an increasing interest in micro-scale light-emitting diodes (μ-LEDs), which can be utilized as light sources for deformable displays, optogenetics, and visible light communications [1]–[6]. The 3-D FDTD method can be employed for the LEE simulation of a vertical chip or thin-film flip-chip structure where the substrate is removed In this case, the lateral dimension of an LED structure is truncated by imposing metal boundary conditions, assuming that light is mostly emitted through the top surface of the LED chip and the sidewall emission is negligible [16]–[18]. The LEE was simulated as the lateral chip dimension varied from 5 to 30 μm, to understand the role of the LEE in the chip-dimension-dependence of the EQE of μ-LEDs. In addition, the dependence of the LEE on the p-GaN thickness was investigated and its dependence was analyzed based on the angular distribution of emission profiles
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