Abstract
Computational logic, in the form of semiconductor chips of the complementary metal oxide semiconductor (CMOS) transistor structure, is used in personal computers, wireless devices, IT network infrastructure, and nearly all modem electronics. This study provides a life-cycle energy analysis for CMOS chips over 7 technology generations with the purpose of comparing energy demand and global warming potential (GWP) impacts of the life-cycle stages, examining trends in these impacts over time and evaluating their sensitivity to data uncertainty and changes in production metrics such as yield. A hybrid life-cycle assessment (LCA) model is used. While life-cycle energy and GWP of emissions have increased on the basis of a wafer or die, these impacts have been reducing per unit of computational power. Sensitivity analysis of the model shows that impacts have the highest relative sensitivity to wafer yield, line yield, and die size and largest absolute sensitivity to the use-phase power demand of the chip.
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