Level-Accurate Peak Activity Estimation in Combinational Circuit Using BILP

Abstract

AbstractDue to shrinking size of transistor and increasing circuit complexity the instantaneous power became a concern for circuit reliability. Higher IR-drop/Ground bounce induces unpredictable delay and can cause soft error. Higher V dd can cause thermal hot-spot. Appropriate selection of V dd and design of power distribution network(PDN) plays crucial role in alleviating such issues. The design of an efficient PDN entirely depend on the knowledge of power budget and dynamic behaviour of instantaneous activity.In this work we have proposed an efficient and level-accurate instantaneous peak activity estimation method. The proposed work uses binary integer linear programming technique(BILP). The methodology perform to estimate the peak activity and generate corresponding input vector pair. The experimental results on ISCAS-85 circuit reveals that the level based approach is 10 to 50 time faster than approach based on total-circuit-ILP formulation. The estimated peak activity is 4 to 9 time improved than previous approach.KeywordsPeak power estimationCombinational circuitsInteger Linear Programming