Level Scaling and Pulse Regulating to Mitigate the Impact of the Cycle-to-Cycle Variation in Memristor-Based Edge AI System

Abstract

As a novel nonvolatile device, the memristor has already delivered many of its promises including low computation complexity and high energy efficiency for the edge artificial intelligence (AI) system in Internet of Things (IoT) applications. However, the intrinsic variability of switching behavior of memristors has been a major obstacle to their implementation. In this study, first, with the Al/TiO <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sub> /TiO <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$_{2-{x}}$ </tex-math></inline-formula> /Al stack structure, memristive crossbar chips are fabricated and tested, and then, we present a model that experimentally demonstrates and quantifies the natural stochasticity of cycle-to-cycle variations. Finally, we propose level scaling and pulse regulating methods to mitigate the adverse impact of cycle-to-cycle variations. The relationship of the level of conductance and cycle-to-cycle variation is studied, and the experiment results show an optimal number of the levels to mitigate the impact of cycle-to-cycle variations in the system. Additionally, the system compresses the number of pulses when the conductance is updated by the pulse stimulus to reduce cycle-to-cycle variations, resulting in the great energy and latency reduction. This work paves the way for the adoption of memristors for more efficient applications for the era of the edge computing in IoT.