Less occupied and ultra-low noise LDO design

Abstract

This paper presents a less-occupied and ultra-low noise LDO structure. This structure can achieve ultra-low noise performance without large filter capacitor by incorporating a capacitance amplifying circuit in the structure of LDO with pre-regulation. A large amount of chip area will be saved in this structure. A novel LDO in proposed structure is realized under SMIC 0.18 μm process. The experiment results show that proposed LDO structure can achieve a total output noise of 25.5 μV between 10 Hz and 1 kHz and 56.4 μV between 1 kHz and 1 MHz with a filter capacitor of 5pF. PSR is ?71.6 dB under low frequency until 49 kHz and at least ?65.7 dB under entire frequency range.