LER-Induced Random Variation–Immune Effect of Metal-Interlayer–Semiconductor Source/Drain Structure on N-Type Ge Junctionless FinFETs

Abstract

Herein, the line-edge roughness (LER)-induced random performance variation–immune effect of metal–interlayer–semiconductor (MIS) source/drain (S/D) in 7 nm n-type Ge (n-Ge) junctionless field-effect transistors (JLFETs) were investigated by 3-D TCAD simulations. Compared to the device without MIS S/D, the n-Ge JLFET with MIS S/D could effectively reduce the Ge fin doping concentration while maintaining the performance. It was demonstrated analytically that the reduced Ge fin doping concentration of the device with MIS S/D, compared to the device without MIS S/D, decreased the LER-induced random performance variations of the n-Ge JLFET; the standard deviations were reduced to ~0.0318 V for ${V} _{\text {th}}$ (reduced by ~51.6%), $4.89\times 10^{\text {-6}}$ A/ $\mu \text{m}$ for ${I} _{\text {on}}$ (reduced by ~92.1%), $1.44\times 10^{\text {-9}}$ A/ $\mu \text{m}$ for ${I} _{\text {off}}$ (reduced by ~93.7%), 1.27 mV/dec for SS (reduced by ~23.1%), and ~5.40 mV/V for drain-induced barrier lowering (DIBL) (reduced by ~30.8%). In addition, LER-induced random performance variation was investigated in terms of scaling down fin widths. The results provided critical insight into the variability reduction of the 7 nm n-Ge JLFETs.