Abstract
This article proposes an LDO with fast response to load transients that can handle any practical capacitive loads. These features are mainly due to a novel frequency compensation circuit tailored for its error amplifier, which is based on an improved version of the popular common gate amplifier. A simple yet effective approach to the small-signal analysis of LDO with multiple feedback loops is employed to analyse intuitively the LDO and derive key design constraints. Simulation and measurement results performed on a test chip implemented in standard 130nm CMOS process validated the proposed LDO. It requires only $0.7\mu \text{A}$ quiescent current but exhibits an excellent response to load transients: when the load current jumps from 0A to 100mA in $1\mu \text{s}$ the output voltage presents an undershoot of 76mV and an overshoot of 198mV, without decoupling capacitors. It compares well against seven LDOs designed with common gate error amplifiers for similar levels of supply voltage, output voltage and current and against seven fast LDOs employing different error amplifiers. A figure-of-merit that considers the quiescent current, the maximum load current and capacitance, as well as the output voltage deviation, yielded a value for our LDO 39.8 times better than for the nearer competitor that employs common gate amplifier and 6 times better than the one employing a different error amplifier. When considering edge time and process scaling the performance of the proposed LDO is 4.8, respectively 4.5, times better than the second best in both comparisons.
Highlights
L OW-DROPOUT voltage regulators (LDOs) are often used in switch-mode power supplies (SMPS) and large Systems-on-Chip (SoC) to separate the supply lines of analog sections sensitive to supply noise from the ones provided to the supply-polluting digital and power-switching sections [1]
Two important changes to the LDO proposed in [5] were introduced in [7]: a simple NMOS buffer was used to drive the input stage of the push-pull amplifier and the resistors within the local common mode feedback (LCMFB) circuit were replaced NMOS transistors driven by fast comparators that monitor the output voltage
Starting from the approximate graphical analysis method introduced in [15] and [16] we developed a method for analysing the circuit proposed in Fig. 2 that provides qualitative insight into the operation of the novel frequency compensation circuit
Summary
L OW-DROPOUT voltage regulators (LDOs) are often used in switch-mode power supplies (SMPS) and large Systems-on-Chip (SoC) to separate the supply lines of analog sections sensitive to supply noise from the ones provided to the supply-polluting digital and power-switching sections [1]. Two important changes to the LDO proposed in [5] were introduced in [7]: a simple NMOS buffer was used to drive the input stage of the push-pull amplifier and the resistors within the LCMFB circuit were replaced NMOS transistors driven by fast comparators that monitor the output voltage. These changes improved significantly the LDO response to fast load and line transients in comparison to [5], but the load capacitance range was not enlarged. The final Section comprises a comprehensive comparison with state-of-the-art and a summary of main points presented in, and of conclusions drawn from, this work
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