LDE-aware Analog Layout Migration with OPC-inclusive Routing

Abstract

Performance degradation in analog circuits due to layout dependent effects (LDEs) has become increasingly challenging in advanced technologies. To address this issue, LDEs have to be seriously considered as performance constraints in the physical design process. In this article, we have proposed an innovative LDE-aware retargeting methodology for analog layout migration from old technologies to new ones with LDEs optimized for performance preservation. The LDE constraints, which are first identified with the aid of a specialized sensitivity analysis scheme, are satisfied during the layout migration process. Moreover, optical proximity correction (OPC), as one of the most popular resolution enhancement techniques for subwavelength lithography in modern nanometer technology manufacturing, is also included in this study. We have developed an OPC-inclusive ILP-based analog router to route electrical nets for improving image fidelity of the final layout while the routability and other analog constraints are respected in the meantime. The experimental results show our proposed layout migration methodology along with the routing scheme is able to retarget analog layouts with better circuit performance and finer image quality compared to the previous works.