Layout Modification of a PD-SOI n-MOSFET for Total Ionizing Dose Effect Hardening

Abstract

A dummy-gate-assisted n-type metal–oxide–semiconductor field-effect transistor (DGA n-MOSFET) structure was modified to allow the use of a silicon-on-insulator (SOI) substrate and evaluated for robustness against the total ionizing dose effect. The modified DGA n-MOSFET on the SOI substrate suppressed all possible radiation-induced leakage current paths by isolating both the drain and source from the sidewall oxide using a p+ layer and from the buried oxide using dummy gates and halo doping. Simulated ${V} _{\textsf {g}}$ – ${I} _{\textsf {d}}$ curves indicated that the modified DGA n-MOSFET on the SOI substrate effectively reduces the leakage current caused by accumulated radiation exposure. Furthermore, experimental gamma radiation exposure data showed that the modified device exhibited good performance, even after exposure up to 300 krad (Si). All devices used in the experiments were fabricated using the 180-nm commercial fabrication process by the CSOI7RF of Global Foundries, formerly IBM Microelectronics.