Layout Inductance Assisted Novel Turn-on Switching Loss Recovery Technique for SiC MOSFETs

Abstract

This article proposes a passive snubber circuit for achieving reliable zero voltage turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> transition with the help of layout inductance in a dc–dc converter. A small assist inductance is inserted in the PCB layout for achieving this zero voltage turn- <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">on</small> . <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">A new regenerative snubber circuit</i> is designed to recover the switching loss corresponding to the voltage overshoots alone. This way energy storage requirement of the snubber circuit is minimized significantly. The proposed snubber circuit is experimentally verified using a 1 kV, 32 A SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> , and 1.2 kV, 30 A Schottky diode in a boost converter setup. For the same voltage overshoot, the proposed snubber circuit has achieved a ten times reduction (89.4%) in switching losses compared to the without snubber case in a boost converter setup at 600 V, 30 A load condition. At 200-kHz switching frequency, the designed boost converter registered a peak efficiency of 98.87% at 5.5 kW load and it achieved 98.45% efficiency at 10 kW load. At 10 kW load, the snubber inductor had an rms current of 0.45 A and a peak current of 4 A flowing through it. The diode and <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> snubber capacitors had a peak voltage of 60 V and 190 V, respectively.