Layout-Dominated Dynamic Imbalanced Current Analysis and Its Suppression Strategy of Parallel SiC MOSFETs

Abstract

The multichip power module is a popular application for large-capacity and high-frequency converters. However, the existence of an asymmetric circuit layout has a significant influence on the current sharing among parallel SiC metal-oxide-semiconductor field-effect transistors (MOSFETs). In this paper, the mechanism of the dynamic current imbalance resulting from the asymmetry of signal terminal confluence points (STCPs) is comprehensively investigated by theoretical analyses and simulation validations. It is demonstrated that the infinite norm of the common branch impedance coupling matrix (INC) can be used to characterize the dynamic current sharing performance. With an increase in the infinite norm, the dynamic current imbalance of parallel SiC MOSFETs gradually increases. Moreover, some significant discoveries are obtained. It is concluded that dynamic current imbalance is dominated by the asymmetry of the power source confluence point (PSCP). However, the asymmetry of the drain, gate, and auxiliary source confluence points does not exhibit a great effect on dynamic current sharing. Then, a novel circuit layout with an elliptical structure is proposed to suppress the dynamic current imbalance. Finally, some experimental tests are derived to validate the effectiveness of the designed layout. Compared with the commercial power module, experimental results show that the maximum dynamic imbalanced current with the proposed layout is reduced from 7.39 A to 1.37 A, and the largest dynamic current imbalanced deviation decreases from 28.66% to 5.11%.